Digital Logics

Table of Index

S.N.	Lab Objective	Date	Signature
1	To verify truth table of Basic Gates
2	To verify truth table of NAND and NOR Gates
3	To verify truth table of HALF ADDER and HALF SUBTRACTOR
4	To verify truth table of FULL ADDER and FULL SUBTRACTOR
5	To verify truth table of Encoder and Decoder via simulator
6	To verify truth table of Multiplexer (1:8 MUX) and Demultiplexer (8:1 DEMUX) via Simulator