Computer Architecture

Programs

• Using C++

  • 1s and 2s complement

  • Booth's algorithm

  • Multiplication using Signed Magnitude

  • Non-restoring division

• Using VHDL(very high-speed integrated circuit hardware description language)

  • AND gate

  • OR gate

  • NOT gate

  • Half Adder

  • Full Adder

  • Design of ALU

  • Multiplexer: 4 to 1

  • Demultiplexer: 1 to 4

  • Encoder 8 to 3

  • Decoder 2 to 4

  • Parity Generator

  • Parity Checker

  • 4-bit adder-subtractor

    

    4-bit adder-subtractor
  • Signed Numbers

  • Parallel IN Parallel OUT

  • D-flip flop

    

    D flip flop
  • Shifter Design in VHDL

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  • Comparator

  • ROM 32x8

  • Binary to Gray Code Converter

  • Gray Code to Binary Converter

  • Binary to Excess 3 code Converter

  • Program to implement Multiplier using VHDL

  • 32 x 8 RAM

    

    32 x 8 RAM

    Output:

    

    32 x 8 RAM output
  • Implementation of ROM

    

    ROM

References

VHDL - VHDL Tutorial